EPM7192EGC160-15 by ALTERA CORP | Sourcengine

ALTERA CORP EPM7192EGC160-15

Lifecycle status
Transferred
REACH
REACH compliant
Description
EE PLD, 15ns, 192-Cell, CMOS, CPGA160
Category
Semiconductors Programmable Logic ICs Programmable Logic Devices EE PLD

HTS Code
8542.39.00.01
SB Code
8542.31.00.55

JTAG BST
NO
Technology
CMOS
Width (mm)
39.624
Length (mm)
39.624
JESD-30 Code
S-CPGA-P160
Organization
0 DEDICATED INPUTS, 124 I/O
Package Code
PGA
Package Shape
SQUARE
Package Style
GRID ARRAY Meter
Surface Mount
NO
Terminal Form
PIN/PEG
J-STD-609 Code
e0
Output Function
MACROCELL
Terminal Finish
TIN LEAD
DLA Qualification
Not Qualified
Temperature Grade
COMMERCIAL
Terminal Position
PERPENDICULAR
Additional Feature
CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
Number of I/O Lines
124
Number of Terminals
160
Terminal Pitch (mm)
2.54
Number of Macro Cells
192
Package Body Material
CERAMIC, METAL-SEALED COFIRED
In-System Programmable
NO
Propagation Delay (ns)
15
Seated Height-Max (mm)
5.34
Supply Voltage-Max (V)
5.25
Supply Voltage-Min (V)
4.75
Supply Voltage-Nom (V)
5
Programmable Logic Type
EE PLD
Package Equivalence Code
PGA160M,15X15
Clock Frequency-Max (MHz)
100
Moisture Sensitivity Level
1
Number of Dedicated Inputs
0
Peak Reflow Temperature (Cel)
220
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0