EPM7128ELC84-7
ALTERA CORP
- Lifecycle statusTransferred
- DescriptionEE PLD, 7.5ns, 128-Cell, CMOS, PQCC84
- Category
- HTS Code8542.39.00.01
- SB Code8542.31.00.55
- JTAG BSTNO
- TechnologyCMOS
- Width (mm)29.3116
- Length (mm)29.3116
- JESD-30 CodeS-PQCC-J84
- Organization0 DEDICATED INPUTS, 68 I/O
- Package CodeQCCJ
- Package ShapeSQUARE
- Package StyleCHIP CARRIER Meter
- Surface MountYES
- Terminal FormJ BEND
- J-STD-609 Codee0
- Output FunctionMACROCELL
- Terminal FinishTIN LEAD
- DLA QualificationNot Qualified
- Temperature GradeCOMMERCIAL
- Terminal PositionQUAD
- Additional Feature128 MACROCELLS; CONFIGURABLE I/O OPERATION (3.3V OR 5V); 2 EXTERNAL CLOCKS; SHARED INPUT/CLOCK
- Number of I/O Lines68
- Number of Terminals84
- Terminal Pitch (mm)1.27
- Number of Macro Cells128
- Package Body MaterialPLASTIC/EPOXY
- In-System ProgrammableNO
- Propagation Delay (ns)7.5
- Seated Height-Max (mm)5.08
- Supply Voltage-Max (V)5.25
- Supply Voltage-Min (V)4.75
- Supply Voltage-Nom (V)5
- Programmable Logic TypeEE PLD
- Package Equivalence CodeLDCC84,1.2SQ
- Clock Frequency-Max (MHz)166.7
- Moisture Sensitivity Level2
- Number of Dedicated Inputs0
- Peak Reflow Temperature (Cel)220
- Operating Temperature-Max (Cel)70
- Operating Temperature-Min (Cel)0
- Time@Peak Reflow Temperature-Max (s)20
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EPM7128ELC84-7