EPM570GF100I5N by ALTERA CORP | Sourcengine

ALTERA CORP EPM570GF100I5N

Lifecycle status
NRFND
RoHS
RoHS compliant
Description
CPLD MAX® IIFamily 440Macro Cells 201.1MHz 1.8V 100-Pin FBGA Tray
Category
Semiconductors Programmable Logic ICs Programmable Logic Devices FLASH PLD

HTS Code
8542.39.00.01
SB Code
8542.31.00.55

JTAG BST
YES
Technology
CMOS
Width (mm)
11
Length (mm)
11
JESD-30 Code
S-PBGA-B100
Organization
0 DEDICATED INPUTS, 76 I/O
Package Code
LBGA
Package Shape
SQUARE
Package Style
GRID ARRAY, LOW PROFILE Meter
Surface Mount
YES
Terminal Form
BALL
J-STD-609 Code
e1
Output Function
MACROCELL
Terminal Finish
Tin/Silver/Copper (Sn/Ag/Cu)
DLA Qualification
Not Qualified
Terminal Position
BOTTOM
Additional Feature
IT CAN ALSO OPERATE AT 3.3V
Number of I/O Lines
76
Number of Terminals
100
Terminal Pitch (mm)
1
Number of Macro Cells
440
Package Body Material
PLASTIC/EPOXY
In-System Programmable
YES
Propagation Delay (ns)
8.7
Seated Height-Max (mm)
1.7
Supply Voltage-Max (V)
1.89
Supply Voltage-Min (V)
1.71
Supply Voltage-Nom (V)
1.8
Programmable Logic Type
FLASH PLD
Package Equivalence Code
BGA100,10X10,40
Moisture Sensitivity Level
3
Number of Dedicated Inputs
0
Peak Reflow Temperature (Cel)
260
Time@Peak Reflow Temperature-Max (s)
30