EPM5130GC100-2 by ALTERA CORP | Sourcengine

ALTERA CORP EPM5130GC100-2

Lifecycle status
Transferred
Description
UV PLD, 45ns, CMOS, CPGA100
Category
Semiconductors Programmable Logic ICs Programmable Logic Devices UV PLD

HTS Code
8542.39.00.01
SB Code
8542.31.00.55

Technology
CMOS
Width (mm)
33.528
Length (mm)
33.528
JESD-30 Code
S-CPGA-P100
Organization
19 DEDICATED INPUTS, 64 I/O
Package Code
WPGA
Package Shape
SQUARE
Package Style
GRID ARRAY, WINDOW Meter
Surface Mount
NO
Terminal Form
PIN/PEG
Output Function
MACROCELL
DLA Qualification
Not Qualified
Temperature Grade
COMMERCIAL
Terminal Position
PERPENDICULAR
Additional Feature
128 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS
Number of I/O Lines
64
Number of Terminals
100
Terminal Pitch (mm)
2.54
Package Body Material
CERAMIC, METAL-SEALED COFIRED
Propagation Delay (ns)
45
Seated Height-Max (mm)
4.96
Supply Voltage-Max (V)
5.25
Supply Voltage-Min (V)
4.75
Supply Voltage-Nom (V)
5
Programmable Logic Type
UV PLD
Package Equivalence Code
PGA100M,13X13
Clock Frequency-Max (MHz)
40
Number of Dedicated Inputs
19
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0