EPF10K100GC503-5 by ALTERA CORP | Sourcengine

ALTERA CORP EPF10K100GC503-5

Lifecycle status
Discontinued
REACH
REACH compliant
Description
Loadable PLD, 0.5ns, CMOS, PPGA503
Category
Semiconductors Programmable Logic ICs Programmable Logic Devices LOADABLE PLD

ECCN
3A991.d
ECCN Governance
EAR
HTS Code
8542.31.00.55
SB Code
8542.31.00.55

JTAG BST
YES
Technology
CMOS
JESD-30 Code
S-PPGA-P503
Organization
4 DEDICATED INPUTS, 406 I/O
Package Code
PGA
Package Shape
SQUARE
Package Style
GRID ARRAY Meter
Surface Mount
NO
Terminal Form
PIN/PEG
J-STD-609 Code
e0
Output Function
REGISTERED
Terminal Finish
TIN LEAD
Number of Inputs
406
DLA Qualification
Not Qualified
Number of Outputs
406
Temperature Grade
COMMERCIAL
Terminal Position
PERPENDICULAR
Number of I/O Lines
406
Number of Terminals
503
Terminal Pitch (mm)
1.27
Package Body Material
PLASTIC/EPOXY
In-System Programmable
YES
Propagation Delay (ns)
0.5
Supply Voltage-Max (V)
2.625
Supply Voltage-Min (V)
2.375
Supply Voltage-Nom (V)
2.5
Programmable Logic Type
LOADABLE PLD
Package Equivalence Code
SPGA503,43X43
Moisture Sensitivity Level
1
Number of Dedicated Inputs
4
Peak Reflow Temperature (Cel)
220
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0