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EP610-35DM

Intel Corporation

Intel Corporation EP610-35DM
  • ECCN
    3A001.a.2.c
  • ECCN Governance
    EAR
  • HTS Code
    8542.31.00.55
  • SB Code
    8542.31.00.55
  • JTAG BST
    NO
  • Technology
    CMOS
  • Architecture
    PAL-TYPE
  • JESD-30 Code
    R-CDIP-T24
  • Organization
    4 DEDICATED INPUTS, 16 I/O
  • Package Code
    DIP
  • Package Shape
    RECTANGULAR
  • Package Style
    IN-LINE Meter
  • Surface Mount
    NO
  • Terminal Form
    THROUGH-HOLE
  • Output Function
    MACROCELL
  • Number of Inputs
    20
  • Number of Outputs
    16
  • Terminal Position
    DUAL
  • Number of I/O Lines
    16
  • Number of Terminals
    24
  • Number of Macro Cells
    16
  • Package Body Material
    CERAMIC, METAL-SEALED COFIRED
  • In-System Programmable
    NO
  • Propagation Delay (ns)
    35
  • Supply Voltage-Max (V)
    5.5
  • Supply Voltage-Min (V)
    4.5
  • Supply Voltage-Nom (V)
    5
  • Number of Product Terms
    160
  • Programmable Logic Type
    UV PLD
  • Clock Frequency-Max (MHz)
    28.6
  • Number of Dedicated Inputs
    4
  • Operating Temperature-Max (Cel)
    125
  • Operating Temperature-Min (Cel)
    -55

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EP610-35DM
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EP610-35DM