EP20K100EQC208-1XN by Intel Corporation | Sourcengine

Intel Corporation EP20K100EQC208-1XN

Lifecycle status
Contact Mfr
RoHS
RoHS compliant
REACH
REACH compliant
Description
FPGA APEX 20K Family 100K Gates 4160 Cells 250MHz 0.22um Technology 1.8V 208-Pin PQFP
Category
Semiconductors Programmable Logic ICs Programmable Logic Devices LOADABLE PLD

HTS Code
8542.39.00.01
SB Code
8542.31.00.55

Technology
CMOS
Width (mm)
28
Length (mm)
28
JESD-30 Code
S-PQFP-G208
Organization
4 DEDICATED INPUTS, 151 I/O
Package Code
FQFP
Package Shape
SQUARE
Package Style
FLATPACK, FINE PITCH Meter
Surface Mount
YES
Terminal Form
GULL WING
J-STD-609 Code
e3
Output Function
MACROCELL
Terminal Finish
MATTE TIN
Number of Inputs
143
DLA Qualification
Not Qualified
Number of Outputs
143
Temperature Grade
OTHER
Terminal Position
QUAD
Number of I/O Lines
151
Number of Terminals
208
Terminal Pitch (mm)
0.5
Package Body Material
PLASTIC/EPOXY
Propagation Delay (ns)
1.73
Seated Height-Max (mm)
4.1
Supply Voltage-Max (V)
1.89
Supply Voltage-Min (V)
1.71
Supply Voltage-Nom (V)
1.8
Programmable Logic Type
LOADABLE PLD
Clock Frequency-Max (MHz)
100
Moisture Sensitivity Level
3
Number of Dedicated Inputs
4
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
0