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DSP56011BU81

Motorola,Inc.

Motorola,Inc. DSP56011BU81
  • ECCN
    3A991.a.2
  • ECCN Governance
    EAR
  • HTS Code
    8542.31.00.35
  • SB Code
    8542.31.00.35
  • Format
    FIXED POINT
  • Bit Size
    24
  • Technology
    CMOS
  • Width (mm)
    14
  • Length (mm)
    14
  • RAM (words)
    8448
  • JESD-30 Code
    S-PQFP-G100
  • Package Code
    QFP
  • Boundary Scan
    NO
  • Package Shape
    SQUARE
  • Package Style
    FLATPACK Meter
  • Surface Mount
    YES
  • Terminal Form
    GULL WING
  • Barrel Shifter
    NO
  • J-STD-609 Code
    e0
  • Low Power Mode
    YES
  • Terminal Finish
    TIN LEAD
  • Integrated Cache
    NO
  • Number of Timers
    0
  • Address Bus Width
    3
  • DLA Qualification
    Not Qualified
  • Terminal Position
    QUAD
  • Number of Terminals
    100
  • Program Memory Type
    MROM
  • Terminal Pitch (mm)
    0.5
  • Number of Serial I/Os
    3
  • Package Body Material
    PLASTIC/EPOXY
  • Number of DMA Channels
    0
  • On Chip Data RAM Width
    24
  • Seated Height-Max (mm)
    1.7
  • Supply Voltage-Max (V)
    5.25
  • Supply Voltage-Min (V)
    4.75
  • Supply Voltage-Nom (V)
    5
  • External Data Bus Width
    8
  • Package Equivalence Code
    QFP100,.63SQ,20
  • Clock Frequency-Max (MHz)
    81
  • Internal Bus Architecture
    MULTIPLE
  • Program Memory Width (bits)
    24
  • uPs/uCs/Peripheral ICs Type
    DIGITAL SIGNAL PROCESSOR, OTHER
  • Number of External Interrupts
    3

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DSP56011BU81