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DSG5402PGE100

Texas Instruments Incorporated

DSG5402PGE100 Datasheet
Texas Instruments Incorporated DSG5402PGE100
  • ECCN
    3A991.a.2
  • ECCN Governance
    EAR
  • HTS Code
    8542.31.00.35
  • SB Code
    8542.31.00.35
  • Format
    FIXED POINT
  • Bit Size
    16
  • Technology
    CMOS
  • Width (mm)
    20
  • Length (mm)
    20
  • RAM (words)
    16384
  • JESD-30 Code
    S-PQFP-G144
  • Package Code
    LFQFP
  • Boundary Scan
    YES
  • Package Shape
    SQUARE
  • Package Style
    FLATPACK, LOW PROFILE, FINE PITCH Meter
  • Surface Mount
    YES
  • Terminal Form
    GULL WING
  • Barrel Shifter
    YES
  • J-STD-609 Code
    e4
  • Low Power Mode
    YES
  • Terminal Finish
    Nickel/Palladium/Gold (Ni/Pd/Au)
  • Integrated Cache
    NO
  • Number of Timers
    2
  • Address Bus Width
    20
  • DLA Qualification
    Not Qualified
  • Terminal Position
    QUAD
  • Number of Terminals
    144
  • Program Memory Type
    MROM
  • Terminal Pitch (mm)
    0.5
  • Package Body Material
    PLASTIC/EPOXY
  • Number of DMA Channels
    6
  • On Chip Data RAM Width
    16
  • Seated Height-Max (mm)
    1.6
  • Supply Voltage-Max (V)
    1.98
  • Supply Voltage-Min (V)
    1.71
  • Supply Voltage-Nom (V)
    1.8
  • External Data Bus Width
    16
  • Package Equivalence Code
    QFP144,.87SQ,20
  • Clock Frequency-Max (MHz)
    50
  • Internal Bus Architecture
    MULTIPLE
  • Moisture Sensitivity Level
    2
  • Program Memory Width (bits)
    16
  • uPs/uCs/Peripheral ICs Type
    DIGITAL SIGNAL PROCESSOR, OTHER
  • Number of External Interrupts
    4
  • Peak Reflow Temperature (Cel)
    260
  • Operating Temperature-Max (Cel)
    100
  • Operating Temperature-Min (Cel)
    -40
  • Time@Peak Reflow Temperature-Max (s)
    30

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DSG5402PGE100