DPSD128MX4WY5-DP-XXP1
DPAC TECHNOLOGIES CORP
- Lifecycle statusTransferred
- DescriptionSynchronous DRAM, 128MX4, CMOS, PDSO54
- Category
- ECCNEAR99
- ECCN GovernanceEAR
- HTS Code8542.32.00.28
- SB Code8542.32.00.15
- TechnologyCMOS
- Access ModeFOUR BANK PAGE BURST
- JESD-30 CodeR-PDSO-G54
- Memory Width4
- Package CodeSOP
- Self RefreshYES
- Package ShapeRECTANGULAR
- Package StyleSMALL OUTLINE Meter
- Surface MountYES
- Terminal FormGULL WING
- Memory IC TypeSYNCHRONOUS DRAM
- Operating ModeSYNCHRONOUS
- Number of Ports1
- DLA QualificationNot Qualified
- Terminal PositionDUAL
- Additional FeatureAUTO/SELF REFRESH
- Memory Organization128MX4
- Number of Functions1
- Number of Terminals54
- Number of Words Code128M
- Memory Density (bits)536870912
- Package Body MaterialPLASTIC/EPOXY
- Alternate Memory Width4
- Supply Voltage-Nom (V)3.3
- Number of Words (words)134217728
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