DP3S512X32MXP-15C by DPAC TECHNOLOGIES CORP | Sourcengine

DPAC TECHNOLOGIES CORP DP3S512X32MXP-15C

Lifecycle status
Transferred
Description
SRAM Module, 2MX8, 15ns, CMOS
Category
Semiconductors Memory ICs SRAMs SRAM MODULE

ECCN
3A991.b.2.a
ECCN Governance
EAR
HTS Code
8542.32.00.41
SB Code
8542.32.00.40

Technology
CMOS
JESD-30 Code
S-XQMA-J68
Memory Width
8
Package Shape
SQUARE
Package Style
MICROELECTRONIC ASSEMBLY Meter
Surface Mount
YES
Terminal Form
J BEND
Memory IC Type
SRAM MODULE
Operating Mode
ASYNCHRONOUS
Parallel/Serial
PARALLEL
DLA Qualification
Not Qualified
Temperature Grade
COMMERCIAL
Terminal Position
QUAD
Additional Feature
CONFIGURABLE AS 1M X 16 OR 512K X 32
Memory Organization
2MX8
Number of Functions
1
Number of Terminals
68
Access Time-Max (ns)
15
Number of Words Code
2M
Memory Density (bits)
16777216
Package Body Material
UNSPECIFIED
Supply Voltage-Max (V)
3.6
Supply Voltage-Min (V)
3
Supply Voltage-Nom (V)
3.3
Number of Words (words)
2097152
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0