CY37128P84-125JXC by Cypress Semiconductor Corporation | Sourcengine

Cypress Semiconductor Corporation CY37128P84-125JXC

Lifecycle status
Discontinued
RoHS
RoHS compliant
Description
EE PLD, 10ns, 128-Cell, CMOS, PQCC84
Category
Semiconductors Programmable Logic ICs Programmable Logic Devices EE PLD

HTS Code
8542.39.00.01
SB Code
8542.31.00.55

JTAG BST
YES
Technology
CMOS
Width (mm)
29.3116
Length (mm)
29.3116
JESD-30 Code
S-PQCC-J84
Organization
1 DEDICATED INPUTS, 69 I/O
Package Code
QCCJ
Package Shape
SQUARE
Package Style
CHIP CARRIER Meter
Surface Mount
YES
Terminal Form
J BEND
J-STD-609 Code
e3
Output Function
MACROCELL
Terminal Finish
MATTE TIN
Number of Inputs
70
DLA Qualification
Not Qualified
Number of Outputs
69
Temperature Grade
COMMERCIAL
Terminal Position
QUAD
Additional Feature
128 MACROCELLS; CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
Number of I/O Lines
69
Number of Terminals
84
Terminal Pitch (mm)
1.27
Number of Macro Cells
128
Package Body Material
PLASTIC/EPOXY
In-System Programmable
YES
Propagation Delay (ns)
10
Seated Height-Max (mm)
5.08
Supply Voltage-Max (V)
5.25
Supply Voltage-Min (V)
4.75
Supply Voltage-Nom (V)
5
Programmable Logic Type
EE PLD
Package Equivalence Code
LDCC84,1.0SQ
Clock Frequency-Max (MHz)
83
Moisture Sensitivity Level
3
Number of Dedicated Inputs
1
Peak Reflow Temperature (Cel)
260
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0