CV128PAG by Integrated Device Technology, Inc. | Sourcengine

Integrated Device Technology, Inc. CV128PAG

Lifecycle status
Transferred
RoHS
RoHS compliant
Description
TSSOP 14.00x6.10x1.00 mm 0.50mm Pitch
Category
Semiconductors Logic ICs Clock Drivers PLL BASED CLOCK DRIVER

HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Family
128
Width (mm)
6.1
Length (mm)
12.5
JESD-30 Code
R-PDSO-G56
Package Code
TSSOP
Logic IC Type
PLL BASED CLOCK DRIVER
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH Meter
Surface Mount
YES
Terminal Form
GULL WING
J-STD-609 Code
e3
fmax-Min (MHz)
400
Terminal Finish
MATTE TIN
DLA Qualification
Not Qualified
Temperature Grade
COMMERCIAL
Terminal Position
DUAL
Input Conditioning
DIFFERENTIAL MUX
Number of Functions
1
Number of Terminals
56
Terminal Pitch (mm)
0.5
Package Body Material
PLASTIC/EPOXY
Number of True Outputs
12
Output Characteristics
3-STATE
Seated Height-Max (mm)
1.1
Supply Voltage-Max (V)
3.465
Supply Voltage-Min (V)
3.135
Supply Voltage-Nom (V)
3.3
Package Equivalence Code
TSSOP56,.3,20
Moisture Sensitivity Level
1
Number of Inverted Outputs
0
Peak Reflow Temperature (Cel)
260
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0
Time@Peak Reflow Temperature-Max (s)
30