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CPPLC7-A7BR-40.0000PD

CARDINAL COMPONENTS INC

CPPLC7-A7BR-40.0000PD Datasheet
CARDINAL COMPONENTS INC CPPLC7-A7BR-40.0000PD
  • Output Load
    50 pF
  • J-STD-609 Code
    e4
  • Oscillator Type
    CMOS
  • Terminal Finish
    Gold (Au) - with Nickel (Ni) barrier
  • Mounting Feature
    SURFACE MOUNT
  • Symmetry-Max (%)
    60/40
  • Additional Feature
    POWER DOWN; BULK
  • Fall Time-Max (ns)
    1.8
  • Physical Dimension
    7.0mm x 5.0mm x 1.7mm
  • Rise Time-Max (ns)
    1.8
  • Number of Terminals
    4
  • Package Body Material
    CERAMIC
  • Supply Voltage-Max (V)
    5.5
  • Supply Voltage-Min (V)
    4.5
  • Supply Voltage-Nom (V)
    5
  • Frequency Stability (ppm)
    25
  • Operating Frequency-Nom (MHz)
    40
  • Frequency Adjustment-Mechanical
    NO
  • Operating Temperature-Max (Cel)
    85
  • Operating Temperature-Min (Cel)
    -40

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CPPLC7-A7BR-40.0000PD