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CP2112-F02-GM

Silicon Laboratories, Inc.

CP2112-F02-GM Datasheet
Silicon Laboratories, Inc. CP2112-F02-GM
  • ECCN
    3A991.a.2
  • ECCN Governance
    EAR
  • HTS Code
    8542.31.00.30
  • SB Code
    8542.31.00.30
  • Technology
    CMOS
  • Width (mm)
    4
  • Length (mm)
    4
  • JESD-30 Code
    S-PQCC-N24
  • Package Code
    HWQCCN
  • Package Shape
    SQUARE
  • Package Style
    CHIP CARRIER, HEAT SINK/SLUG, VERY VERY THIN PROFILE Meter
  • Surface Mount
    YES
  • Terminal Form
    NO LEAD
  • J-STD-609 Code
    e3
  • Terminal Finish
    Matte Tin (Sn)
  • Address Bus Width
    0
  • Bus Compatibility
    I2C, SMBUS, USB
  • DLA Qualification
    Not Qualified
  • Temperature Grade
    MILITARY
  • Terminal Position
    QUAD
  • Number of Terminals
    24
  • Terminal Pitch (mm)
    0.5
  • Package Body Material
    PLASTIC/EPOXY
  • Seated Height-Max (mm)
    0.8
  • Supply Voltage-Max (V)
    3.6
  • Supply Voltage-Min (V)
    3
  • Supply Voltage-Nom (V)
    3.3
  • External Data Bus Width
    0
  • Supply Current-Max (mA)
    16
  • Drive Interface Standard
    USB
  • Package Equivalence Code
    LCC24,.16SQ,20
  • Clock Frequency-Max (MHz)
    48
  • Moisture Sensitivity Level
    1
  • uPs/uCs/Peripheral ICs Type
    BUS CONTROLLER, UNIVERSAL SERIAL BUS
  • Data Transfer Rate-Max (MBps)
    1.5
  • Peak Reflow Temperature (Cel)
    260
  • Operating Temperature-Max (Cel)
    85
  • Operating Temperature-Min (Cel)
    -40
  • Time@Peak Reflow Temperature-Max (s)
    40

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CP2112-F02-GM