CD4027BPWRE4 by Texas Instruments Incorporated | Sourcengine

Texas Instruments Incorporated CD4027BPWRE4

Lifecycle status
Discontinued
RoHS
RoHS compliant
Description
J-K Flip-Flop, 4000/14000/40000 Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output, CMOS, PDSO16
Category
Semiconductors Logic ICs FF/Latches J-K FLIP-FLOP

HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Family
4000/14000/40000
Technology
CMOS
Width (mm)
4.4
Length (mm)
5
JESD-30 Code
R-PDSO-G16
Package Code
TSSOP
Trigger Type
POSITIVE EDGE
Logic IC Type
J-K FLIP-FLOP
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH Meter
Surface Mount
YES
Terminal Form
GULL WING
J-STD-609 Code
e4
Number of Bits
2
Packing Method
TR
fmax-Min (MHz)
12
Output Polarity
COMPLEMENTARY
Terminal Finish
NICKEL PALLADIUM GOLD
DLA Qualification
Not Qualified
Temperature Grade
MILITARY
Terminal Position
DUAL
Number of Functions
2
Number of Terminals
16
Terminal Pitch (mm)
0.65
Load Capacitance (pF)
50
Package Body Material
PLASTIC/EPOXY
Propagation Delay (ns)
300
Seated Height-Max (mm)
1.2
Supply Voltage-Max (V)
18
Supply Voltage-Min (V)
3
Supply Voltage-Nom (V)
5
Package Equivalence Code
TSSOP16,.25
Frequency-Max@Nom-Sup (Hz)
3500000
Moisture Sensitivity Level
1
Peak Reflow Temperature (Cel)
260
Operating Temperature-Max (Cel)
125
Operating Temperature-Min (Cel)
-55
Time@Peak Reflow Temperature-Max (s)
30