ASM2P3805DG-20-AT by Alliance Semiconductor Corporation | Sourcengine

Alliance Semiconductor Corporation ASM2P3805DG-20-AT

Lifecycle status
Transferred
RoHS
RoHS compliant
Description
Low Skew Clock Driver, 3805 Series, 5 True Output(s), 0 Inverted Output(s), CMOS, PDSO20
Category
Semiconductors Logic ICs Clock Drivers LOW SKEW CLOCK DRIVER

HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Family
3805
Technology
CMOS
Width (mm)
3.9
Length (mm)
8.649
JESD-30 Code
R-PDSO-G20
Package Code
SSOP
Logic IC Type
LOW SKEW CLOCK DRIVER
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE, SHRINK PITCH Meter
Surface Mount
YES
Terminal Form
GULL WING
J-STD-609 Code
e3
Terminal Finish
Matte Tin (Sn)
DLA Qualification
Not Qualified
Temperature Grade
COMMERCIAL
Terminal Position
DUAL
Input Conditioning
STANDARD
Number of Functions
2
Number of Terminals
20
Terminal Pitch (mm)
0.635
Package Body Material
PLASTIC/EPOXY
Number of True Outputs
5
Output Characteristics
3-STATE
Propagation Delay (ns)
3
Seated Height-Max (mm)
1.753
Supply Voltage-Max (V)
3.6
Supply Voltage-Min (V)
3
Supply Voltage-Nom (V)
3.3
Number of Inverted Outputs
0
Peak Reflow Temperature (Cel)
250
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0
Same Edge Clock Skew Delay-Max (ns)
0.27
Time@Peak Reflow Temperature-Max (s)
40