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ADSP-3128SG

Analog Devices, Inc.

Analog Devices, Inc. ADSP-3128SG
  • ECCN
    3A001.a.2.c
  • ECCN Governance
    EAR
  • HTS Code
    8542.39.00.60
  • SB Code
    8542.39.00.60
  • Technology
    CMOS
  • JESD-30 Code
    S-CPGA-P145
  • Package Code
    PGA
  • Boundary Scan
    NO
  • Package Shape
    SQUARE
  • Package Style
    GRID ARRAY Meter
  • Surface Mount
    NO
  • Terminal Form
    PIN/PEG
  • Low Power Mode
    NO
  • Terminal Finish
    Tin/Lead (Sn/Pb)
  • Terminal Position
    PERPENDICULAR
  • Number of Terminals
    145
  • Output Data Bus Width
    16
  • Package Body Material
    CERAMIC, METAL-SEALED COFIRED
  • Supply Voltage-Max (V)
    5.5
  • Supply Voltage-Min (V)
    4.5
  • Supply Voltage-Nom (V)
    5
  • External Data Bus Width
    16
  • Supply Current-Max (mA)
    50
  • Clock Frequency-Max (MHz)
    20
  • uPs/uCs/Peripheral ICs Type
    DSP PERIPHERAL, PIPELINE REGISTER
  • Operating Temperature-Max (Cel)
    125
  • Operating Temperature-Min (Cel)
    -55

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ADSP-3128SG
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ADSP-3128SG