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AD840JCHIPS

Analog Devices, Inc.

Analog Devices, Inc. AD840JCHIPS
  • ECCN
    EAR99
  • ECCN Governance
    EAR
  • HTS Code
    8542.39.00.01
  • SB Code
    8542.39.00.00
  • Power
    NO
  • Low-Bias
    NO
  • Wideband
    YES
  • Low-Offset
    NO
  • Micropower
    NO
  • Technology
    JFET
  • JESD-30 Code
    R-XUUC-N8
  • Package Code
    DIE
  • Package Shape
    RECTANGULAR
  • Package Style
    UNCASED CHIP Meter
  • Surface Mount
    YES
  • Terminal Form
    NO LEAD
  • Amplifier Type
    OPERATIONAL AMPLIFIER
  • J-STD-609 Code
    e0
  • Terminal Finish
    Tin/Lead (Sn/Pb)
  • Amp Architecture
    VOLTAGE-FEEDBACK
  • Voltage Gain-Min
    50000
  • DLA Qualification
    Not Qualified
  • Temperature Grade
    COMMERCIAL EXTENDED
  • Terminal Position
    UPPER
  • Programmable Power
    NO
  • Number of Functions
    1
  • Number of Terminals
    7
  • Slew Rate-Min (V/us)
    350
  • Slew Rate-Nom (V/us)
    400
  • Package Body Material
    UNSPECIFIED
  • Frequency Compensation
    YES (AVCL>=10)
  • Supply Voltage-Nom (V)
    15
  • Supply Current-Max (mA)
    16
  • Unity Gain BW-Nom (kHz)
    400000
  • Package Equivalence Code
    DIE OR CHIP
  • Supply Voltage Limit-Max (V)
    18
  • Input Offset Voltage-Max (uV)
    1500
  • Negative Supply Voltage-Nom (V)
    -15
  • Operating Temperature-Max (Cel)
    75
  • Operating Temperature-Min (Cel)
    0
  • Bias Current-Max (IIB) @25C (uA)
    8
  • Neg Supply Voltage Limit-Max (V)
    -18
  • Common-mode Reject Ratio-Min (dB)
    85
  • Common-mode Reject Ratio-Nom (dB)
    110
  • Average Bias Current-Max (IIB) (uA)
    10

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AD840JCHIPS
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AD840JCHIPS