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A6812SEP-T

Allegro MicroSystems

Allegro MicroSystems A6812SEP-T
  • ECCN
    EAR99
  • ECCN Governance
    EAR
  • HTS Code
    8542.39.00.01
  • SB Code
    8542.39.00.00
  • Technology
    CMOS
  • Width (mm)
    11.51
  • Length (mm)
    11.51
  • Display Mode
    DOT MATRIX
  • JESD-30 Code
    S-PQCC-J28
  • Package Code
    QCCJ
  • Package Shape
    SQUARE
  • Package Style
    CHIP CARRIER Meter
  • Surface Mount
    YES
  • Terminal Form
    J BEND
  • J-STD-609 Code
    e3
  • fmax-Min (MHz)
    10
  • Data Input Mode
    SERIAL
  • Terminal Finish
    Matte Tin (Sn)
  • DLA Qualification
    Not Qualified
  • Interface IC Type
    VACUUM FLUORESCENT DISPLAY DRIVER
  • Temperature Grade
    OTHER
  • Terminal Position
    QUAD
  • Additional Feature
    CAN ALSO OPERATE WITH 5V LOGIC SUPPLY
  • Number of Segments
    20
  • Number of Functions
    1
  • Number of Terminals
    28
  • Terminal Pitch (mm)
    1.27
  • Package Body Material
    PLASTIC/EPOXY
  • Seated Height-Max (mm)
    4.57
  • Supply Voltage-Nom (V)
    3.3
  • Supply Current-Max (mA)
    6
  • Supply Voltage1-Nom (V)
    60
  • Package Equivalence Code
    LDCC28,.5SQ
  • Moisture Sensitivity Level
    3
  • Peak Reflow Temperature (Cel)
    260
  • Multiplexed Display Capability
    NO
  • Operating Temperature-Max (Cel)
    85
  • Operating Temperature-Min (Cel)
    -20
  • Time@Peak Reflow Temperature-Max (s)
    40

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A6812SEP-T
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A6812SEP-T