9DS400AFLF by Renesas Electronics Corp. | Sourcengine

Renesas Electronics Corp. 9DS400AFLF

Lifecycle status
Discontinued
RoHS
RoHS compliant
REACH
REACH compliant
Description
PLL Based Clock Driver, 9DS Series, 4 True Output(s), 0 Inverted Output(s), PDSO28
Category
Semiconductors Logic ICs Clock Drivers PLL BASED CLOCK DRIVER

HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Family
9DS
Width (mm)
5.3
Length (mm)
10.2
JESD-30 Code
R-PDSO-G28
Package Code
SSOP
Logic IC Type
PLL BASED CLOCK DRIVER
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE, SHRINK PITCH Meter
Surface Mount
YES
Terminal Form
GULL WING
Packing Method
TR
Terminal Position
DUAL
Input Conditioning
DIFFERENTIAL MUX
Number of Functions
1
Number of Terminals
28
Terminal Pitch (mm)
0.65
Package Body Material
PLASTIC/EPOXY
Number of True Outputs
4
Output Characteristics
3-STATE
Seated Height-Max (mm)
2
Supply Voltage-Max (V)
3.465
Supply Voltage-Min (V)
3.135
Supply Voltage-Nom (V)
3.3
Supply Current-Max (mA)
125
Package Equivalence Code
SSOP28,.3
Number of Inverted Outputs
0
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0
Same Edge Clock Skew Delay-Max (ns)
0.05