97ULP877AK-T by Renesas Electronics Corp. | Sourcengine

Renesas Electronics Corp. 97ULP877AK-T

Lifecycle status
Active
Description
PLL Based Clock Driver, 97ULP Series, 10 True Output(s), 0 Inverted Output(s), PQCC40
Category
Semiconductors Logic ICs Clock Drivers PLL BASED CLOCK DRIVER

HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Family
97ULP
Width (mm)
6
Length (mm)
6
JESD-30 Code
S-PQCC-N40
Package Code
HVQCCN
Logic IC Type
PLL BASED CLOCK DRIVER
Package Shape
SQUARE
Package Style
CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE Meter
Surface Mount
YES
Terminal Form
NO LEAD
Packing Method
TR
fmax-Min (MHz)
410
Terminal Finish
Tin/Lead (Sn/Pb)
DLA Qualification
Not Qualified
Terminal Position
QUAD
Input Conditioning
DIFFERENTIAL MUX
Number of Functions
1
Number of Terminals
40
Terminal Pitch (mm)
0.5
Package Body Material
PLASTIC/EPOXY
Number of True Outputs
10
Output Characteristics
3-STATE
Seated Height-Max (mm)
1
Supply Voltage-Max (V)
1.9
Supply Voltage-Min (V)
1.7
Supply Voltage-Nom (V)
1.8
Supply Current-Max (mA)
200
Package Equivalence Code
LCC40,.24SQ,20
Number of Inverted Outputs
0
Output Low Current-Max (mA)
9
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0
Same Edge Clock Skew Delay-Max (ns)
0.04