Texas Instruments Incorporated 74ACT11280J
  • HTS Code
    8542.39.00.01
  • SB Code
    8542.39.00.00
  • Width
    7.62 mm
  • Family
    ACT
  • Length
    19.56 mm
  • Technology
    CMOS
  • JESD-30 Code
    R-GDIP-T14
  • Package Code
    DIP
  • Logic IC Type
    PARITY GENERATOR/CHECKER
  • Package Shape
    RECTANGULAR
  • Package Style
    IN-LINE Meter
  • Surface Mount
    NO
  • Terminal Form
    THROUGH-HOLE
  • Number of Bits
    9
  • Terminal Pitch
    2.54 mm
  • Output Polarity
    COMPLEMENTARY
  • Seated Height-Max
    5.08 mm
  • Temperature Grade
    INDUSTRIAL
  • Terminal Position
    DUAL
  • Additional Feature
    ODD/EVEN PARITY GENERATOR
  • Number of Functions
    1
  • Number of Terminals
    14
  • Qualification Status
    Not Qualified
  • Load Capacitance (CL)
    50 pF
  • Package Body Material
    CERAMIC, GLASS-SEALED
  • Propagation Delay (tpd)
    14.3 ns
  • Package Equivalence Code
    DIP14,.3
  • Operating Temperature-Max
    85 Cel
  • Operating Temperature-Min
    -40 Cel
  • Supply Voltage-Max (Vsup)
    5.5 V
  • Supply Voltage-Min (Vsup)
    4.5 V
  • Supply Voltage-Nom (Vsup)
    5 V
  • Power Supply Current-Max (ICC)
    0.08 mA

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74ACT11280J