7201LA50JB by Renesas Electronics Corp. | Sourcengine

Renesas Electronics Corp. 7201LA50JB

Lifecycle status
Active
Description
FIFO, 512X9, 50ns, Asynchronous, CMOS, PQCC32
Category
Semiconductors Memory ICs FIFOs OTHER FIFO

ECCN
EAR99
ECCN Governance
EAR
HTS Code
8542.32.00.71
SB Code
8542.32.00.70

Technology
CMOS
Width (mm)
11.43
Length (mm)
13.97
JESD-30 Code
R-PQCC-J32
Memory Width
9
Package Code
QCCJ
Output Enable
NO
Package Shape
RECTANGULAR
Package Style
CHIP CARRIER Meter
Surface Mount
YES
Terminal Form
J BEND
J-STD-609 Code
e0
Memory IC Type
OTHER FIFO
Operating Mode
ASYNCHRONOUS
Cycle Time (ns)
65
Parallel/Serial
PARALLEL
Terminal Finish
TIN LEAD
DLA Qualification
Not Qualified
Temperature Grade
MILITARY
Terminal Position
QUAD
Additional Feature
RETRANSMIT
Memory Organization
512X9
Number of Functions
1
Number of Terminals
32
Terminal Pitch (mm)
1.27
Access Time-Max (ns)
50
Number of Words Code
512
Memory Density (bits)
4608
Package Body Material
PLASTIC/EPOXY
Seated Height-Max (mm)
3.55
Supply Voltage-Max (V)
5.5
Supply Voltage-Min (V)
4.5
Supply Voltage-Nom (V)
5
Number of Words (words)
512
Standby Current-Max (A)
0.015
Supply Current-Max (mA)
100
Package Equivalence Code
LDCC32,.5X.6
Clock Frequency-Max (MHz)
33.3
Moisture Sensitivity Level
1
Peak Reflow Temperature (Cel)
225
Operating Temperature-Max (Cel)
125
Operating Temperature-Min (Cel)
-55
Screening Level / Reference Standard
MIL-STD-883 Class B
Time@Peak Reflow Temperature-Max (s)
20