7200L25TP
Integrated Device Technology, Inc.
- Lifecycle statusTransferred
- DescriptionPDIP 34.30x7.62x3.30 mm 2.54mm Pitch
- Category
- ECCNEAR99
- ECCN GovernanceEAR
- HTS Code8542.32.00.71
- SB Code8542.32.00.70
- TechnologyCMOS
- Width (mm)7.62
- Length (mm)34.671
- JESD-30 CodeR-PDIP-T28
- Memory Width9
- Package CodeDIP
- Output EnableNO
- Package ShapeRECTANGULAR
- Package StyleIN-LINE Meter
- Surface MountNO
- Terminal FormTHROUGH-HOLE
- J-STD-609 Codee0
- Memory IC TypeOTHER FIFO
- Operating ModeASYNCHRONOUS
- Cycle Time (ns)35
- Parallel/SerialPARALLEL
- Terminal FinishTIN LEAD
- DLA QualificationNot Qualified
- Temperature GradeCOMMERCIAL
- Terminal PositionDUAL
- Additional FeatureRETRANSMIT
- Memory Organization256X9
- Number of Functions1
- Number of Terminals28
- Terminal Pitch (mm)2.54
- Access Time-Max (ns)25
- Number of Words Code256
- Memory Density (bits)2304
- Package Body MaterialPLASTIC/EPOXY
- Seated Height-Max (mm)4.572
- Supply Voltage-Max (V)5.5
- Supply Voltage-Min (V)4.5
- Supply Voltage-Nom (V)5
- Number of Words (words)256
- Standby Current-Max (A)0.0005
- Supply Current-Max (mA)125
- Package Equivalence CodeDIP28,.3
- Clock Frequency-Max (MHz)28.5
- Moisture Sensitivity Level1
- Peak Reflow Temperature (Cel)245
- Operating Temperature-Max (Cel)70
- Operating Temperature-Min (Cel)0
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7200L25TP