Integrated Device Technology, Inc. 71V421S25JG
  • ECCN
    EAR99
  • ECCN Governance
    EAR
  • HTS Code
    8542.32.00.41
  • SB Code
    8542.32.00.40
  • Technology
    CMOS
  • JESD-30 Code
    S-PQCC-N52
  • Memory Width
    8
  • Organization
    2KX8
  • Package Code
    QCCN
  • JESD-609 Code
    e3
  • Package Shape
    SQUARE
  • Package Style
    CHIP CARRIER Meter
  • Surface Mount
    YES
  • Terminal Form
    NO LEAD
  • Memory Density
    16384 bit
  • Memory IC Type
    MULTI-PORT SRAM
  • Operating Mode
    ASYNCHRONOUS
  • Access Time-Max
    25 ns
  • Number of Words
    2048 words
  • Parallel/Serial
    PARALLEL
  • Terminal Finish
    MATTE TIN
  • Temperature Grade
    COMMERCIAL
  • Terminal Position
    QUAD
  • Number of Functions
    1
  • Number of Terminals
    52
  • Number of Words Code
    2K
  • Package Body Material
    PLASTIC/EPOXY
  • Operating Temperature-Max
    70 Cel
  • Operating Temperature-Min
    0 Cel
  • Supply Voltage-Max (Vsup)
    3.6 V
  • Supply Voltage-Min (Vsup)
    3 V
  • Supply Voltage-Nom (Vsup)
    3.3 V
  • Moisture Sensitivity Level
    1
  • Peak Reflow Temperature (Cel)
    260
  • Time@Peak Reflow Temperature-Max (s)
    30

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71V421S25JG