673M-01I by Integrated Device Technology, Inc. | Sourcengine

Integrated Device Technology, Inc. 673M-01I

Lifecycle status
Discontinued
Description
PLL Based Clock Driver, 673 Series, 2 True Output(s), 0 Inverted Output(s), CMOS, PDSO16
Category
Semiconductors Logic ICs Clock Drivers PLL BASED CLOCK DRIVER

HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Family
673
Technology
CMOS
Width (mm)
3.9
Length (mm)
9.9
JESD-30 Code
R-PDSO-G16
Package Code
SOP
Logic IC Type
PLL BASED CLOCK DRIVER
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE Meter
Surface Mount
YES
Terminal Form
GULL WING
J-STD-609 Code
e0
fmax-Min (MHz)
120
Terminal Finish
Tin/Lead (Sn85Pb15)
DLA Qualification
Not Qualified
Temperature Grade
INDUSTRIAL
Terminal Position
DUAL
Additional Feature
ALSO OPERATES WITH 5V SUPPLY
Input Conditioning
STANDARD
Number of Functions
1
Number of Terminals
16
Terminal Pitch (mm)
1.27
Package Body Material
PLASTIC/EPOXY
Number of True Outputs
2
Output Characteristics
3-STATE
Seated Height-Max (mm)
1.75
Supply Voltage-Max (V)
5.5
Supply Voltage-Min (V)
3.13
Supply Voltage-Nom (V)
3.3
Moisture Sensitivity Level
1
Number of Inverted Outputs
0
Peak Reflow Temperature (Cel)
240
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
-40
Time@Peak Reflow Temperature-Max (s)
30