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XC2C64-7CPG56I

Xilinx,Inc.

Xilinx,Inc. XC2C64-7CPG56I
  • HTS Code
    8542.39.00.01
  • SB Code
    8542.39.00.00
  • Width
    6 mm
  • Length
    6 mm
  • JTAG BST
    YES
  • Technology
    CMOS
  • JESD-30 Code
    S-PBGA-B56
  • Organization
    0 DEDICATED INPUTS, 45 I/O
  • Package Code
    LFBGA
  • JESD-609 Code
    e1
  • Package Shape
    SQUARE
  • Package Style
    GRID ARRAY, LOW PROFILE, FINE PITCH Meter
  • Surface Mount
    YES
  • Terminal Form
    BALL
  • Terminal Pitch
    0.5 mm
  • Output Function
    MACROCELL
  • Terminal Finish
    Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5)
  • Propagation Delay
    7.5 ns
  • Seated Height-Max
    1.35 mm
  • Temperature Grade
    INDUSTRIAL
  • Terminal Position
    BOTTOM
  • Additional Feature
    REAL DIGITAL DESIGN TECHNOLOGY
  • Supply Voltage-Max
    1.9 V
  • Supply Voltage-Min
    1.7 V
  • Supply Voltage-Nom
    1.8 V
  • Number of I/O Lines
    45
  • Number of Terminals
    56
  • Qualification Status
    Not Qualified
  • Number of Macro Cells
    64
  • Package Body Material
    PLASTIC/EPOXY
  • In-System Programmable
    YES
  • Programmable Logic Type
    FLASH PLD
  • Package Equivalence Code
    BGA56,10X10,20
  • Operating Temperature-Max
    85 Cel
  • Operating Temperature-Min
    -40 Cel
  • Moisture Sensitivity Level
    3
  • Number of Dedicated Inputs
    0
  • Peak Reflow Temperature (Cel)
    260
  • Time@Peak Reflow Temperature-Max (s)
    30

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XC2C64-7CPG56I