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XC2C128-7VQ100C

Xilinx,Inc.

Xilinx,Inc. XC2C128-7VQ100C
  • ECCN
    EAR99
  • ECCN Governance
    EAR
  • HTS Code
    8542.39.00.01
  • SB Code
    8542.39.00.00
  • JTAG BST
    YES
  • Technology
    CMOS
  • Width (mm)
    14
  • Length (mm)
    14
  • Architecture
    PLA-TYPE
  • JESD-30 Code
    S-PQFP-G100
  • Organization
    0 DEDICATED INPUTS, 80 I/O
  • Package Code
    TFQFP
  • Package Shape
    SQUARE
  • Package Style
    FLATPACK, THIN PROFILE, FINE PITCH Meter
  • Surface Mount
    YES
  • Terminal Form
    GULL WING
  • J-STD-609 Code
    e4
  • Output Function
    MACROCELL
  • Terminal Finish
    NICKEL PALLADIUM GOLD
  • Number of Inputs
    80
  • DLA Qualification
    Not Qualified
  • Number of Outputs
    80
  • Temperature Grade
    COMMERCIAL
  • Terminal Position
    QUAD
  • Additional Feature
    YES
  • Number of I/O Lines
    80
  • Number of Terminals
    100
  • Terminal Pitch (mm)
    0.5
  • Number of Macro Cells
    128
  • Package Body Material
    PLASTIC/EPOXY
  • In-System Programmable
    YES
  • Propagation Delay (ns)
    7.5
  • Seated Height-Max (mm)
    1.2
  • Supply Voltage-Max (V)
    1.9
  • Supply Voltage-Min (V)
    1.7
  • Supply Voltage-Nom (V)
    1.8
  • Programmable Logic Type
    FLASH PLD
  • Package Equivalence Code
    TQFP100,.63SQ
  • Clock Frequency-Max (MHz)
    119
  • Moisture Sensitivity Level
    3
  • Number of Dedicated Inputs
    0
  • Operating Temperature-Max (Cel)
    70
  • Operating Temperature-Min (Cel)
    0

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XC2C128-7VQ100C