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XC17128EPDG8I

Xilinx,Inc.

Xilinx,Inc. XC17128EPDG8I
  • ECCN
    EAR99
  • ECCN Governance
    EAR
  • HTS Code
    8542.32.00.51
  • SB Code
    8542.32.00.50
  • Width
    7.62 mm
  • Length
    9.3599 mm
  • Technology
    CMOS
  • JESD-30 Code
    R-PDIP-T8
  • Memory Width
    1
  • Organization
    128KX1
  • Package Code
    DIP
  • JESD-609 Code
    e3
  • Package Shape
    RECTANGULAR
  • Package Style
    IN-LINE Meter
  • Surface Mount
    NO
  • Terminal Form
    THROUGH-HOLE
  • Memory Density
    131072 bit
  • Memory IC Type
    CONFIGURATION MEMORY
  • Operating Mode
    SYNCHRONOUS
  • Terminal Pitch
    2.54 mm
  • Number of Words
    131072 words
  • Parallel/Serial
    SERIAL
  • Terminal Finish
    Matte Tin (Sn)
  • Seated Height-Max
    4.5974 mm
  • Temperature Grade
    INDUSTRIAL
  • Terminal Position
    DUAL
  • Additional Feature
    USED FOR STORING THE CONFIGURATION BITSTREAMS OF XILINX FPGAS
  • Number of Functions
    1
  • Number of Terminals
    8
  • Number of Words Code
    128K
  • Qualification Status
    Not Qualified
  • Package Body Material
    PLASTIC/EPOXY
  • Operating Temperature-Max
    85 Cel
  • Operating Temperature-Min
    -40 Cel
  • Supply Voltage-Max (Vsup)
    5.5 V
  • Supply Voltage-Min (Vsup)
    4.5 V
  • Supply Voltage-Nom (Vsup)
    5 V
  • Moisture Sensitivity Level
    1
  • Peak Reflow Temperature (Cel)
    250
  • Time@Peak Reflow Temperature-Max (s)
    30

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