TC554101J-25
Toshiba Corporation
- Lifecycle statusActive-Unconfirmed
- DescriptionCache SRAM, 1MX4, 25ns, CMOS, PDSO36
- Category
- ECCN3A991.b.2.a
- ECCN GovernanceEAR
- HTS Code8542.32.00.41
- SB Code8542.32.00.40
- I/O TypeSEPARATE
- TechnologyCMOS
- Width (mm)10.16
- Length (mm)23.5
- JESD-30 CodeR-PDSO-J36
- Memory Width4
- Package CodeSOJ
- Package ShapeRECTANGULAR
- Package StyleSMALL OUTLINE Meter
- Surface MountYES
- Terminal FormJ BEND
- J-STD-609 Codee0
- Memory IC TypeCACHE SRAM
- Operating ModeASYNCHRONOUS
- Parallel/SerialPARALLEL
- Terminal FinishTIN LEAD
- DLA QualificationNot Qualified
- Temperature GradeCOMMERCIAL
- Terminal PositionDUAL
- Memory Organization1MX4
- Number of Functions1
- Number of Terminals36
- Terminal Pitch (mm)1.27
- Access Time-Max (ns)25
- Number of Words Code1M
- Memory Density (bits)4194304
- Package Body MaterialPLASTIC/EPOXY
- Output Characteristics3-STATE
- Seated Height-Max (mm)3.7
- Supply Voltage-Max (V)5.5
- Supply Voltage-Min (V)4.5
- Supply Voltage-Nom (V)5
- Number of Words (words)1048576
- Standby Current-Max (A)0.01
- Standby Voltage-Min (V)4.5
- Supply Current-Max (mA)160
- Package Equivalence CodeSOJ36,.44
- Operating Temperature-Max (Cel)70
- Operating Temperature-Min (Cel)0
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TC554101J-25