TC551402J-30
Toshiba Corporation
- Lifecycle statusDiscontinued
- DescriptionCache SRAM, 4MX1, 30ns, CMOS, PDSO32
- Category
- ECCN3A991.b.2.a
- ECCN GovernanceEAR
- HTS Code8542.32.00.41
- SB Code8542.32.00.40
- TechnologyCMOS
- Width (mm)10.2
- Length (mm)21
- JESD-30 CodeR-PDSO-J32
- Memory Width1
- Package CodeSOJ
- Package ShapeRECTANGULAR
- Package StyleSMALL OUTLINE Meter
- Surface MountYES
- Terminal FormJ BEND
- J-STD-609 Codee0
- Memory IC TypeCACHE SRAM
- Operating ModeASYNCHRONOUS
- Parallel/SerialSERIAL
- Terminal FinishTin/Lead (Sn/Pb)
- DLA QualificationNot Qualified
- Temperature GradeCOMMERCIAL
- Terminal PositionDUAL
- Memory Organization4MX1
- Number of Functions1
- Number of Terminals32
- Terminal Pitch (mm)1.27
- Access Time-Max (ns)30
- Number of Words Code4M
- Memory Density (bits)4194304
- Package Body MaterialPLASTIC/EPOXY
- Seated Height-Max (mm)3.6
- Supply Voltage-Max (V)5.5
- Supply Voltage-Min (V)4.5
- Supply Voltage-Nom (V)5
- Number of Words (words)4194304
- Operating Temperature-Max (Cel)70
- Operating Temperature-Min (Cel)0
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TC551402J-30