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PZ5064I12A68

Xilinx,Inc.

Xilinx,Inc. PZ5064I12A68
  • HTS Code
    8542.39.00.01
  • SB Code
    8542.31.00.55
  • JTAG BST
    NO
  • Technology
    CMOS
  • JESD-30 Code
    S-PQCC-J68
  • Package Code
    QCCJ
  • Package Shape
    SQUARE
  • Package Style
    CHIP CARRIER Meter
  • Surface Mount
    YES
  • Terminal Form
    J BEND
  • J-STD-609 Code
    e0
  • Terminal Finish
    Tin/Lead (Sn85Pb15)
  • DLA Qualification
    Not Qualified
  • Temperature Grade
    INDUSTRIAL
  • Terminal Position
    QUAD
  • Additional Feature
    NO
  • Number of Terminals
    68
  • Terminal Pitch (mm)
    1.27
  • Number of Macro Cells
    64
  • Package Body Material
    PLASTIC/EPOXY
  • In-System Programmable
    NO
  • Propagation Delay (ns)
    14.5
  • Supply Voltage-Nom (V)
    5
  • Programmable Logic Type
    EE PLD
  • Package Equivalence Code
    LDCC68,1.0SQ
  • Moisture Sensitivity Level
    3
  • Operating Temperature-Max (Cel)
    85
  • Operating Temperature-Min (Cel)
    -40

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PZ5064I12A68