PZ3128IS15BP-S by Xilinx,Inc. | Sourcengine

Xilinx,Inc. PZ3128IS15BP-S

Lifecycle status
Discontinued
Description
EE PLD, 17.5ns, 128-Cell, CMOS, PQFP100
Category
Semiconductors Programmable Logic ICs Programmable Logic Devices EE PLD

HTS Code
8542.39.00.01
SB Code
8542.31.00.55

JTAG BST
YES
Technology
CMOS
Width (mm)
14
Length (mm)
14
JESD-30 Code
S-PQFP-G100
Organization
2 DEDICATED INPUTS, 80 I/O
Package Code
TFQFP
Package Shape
SQUARE
Package Style
FLATPACK, THIN PROFILE, FINE PITCH Meter
Surface Mount
YES
Terminal Form
GULL WING
Packing Method
TRAY
Output Function
MACROCELL
Number of Inputs
84
DLA Qualification
Not Qualified
Number of Outputs
80
Temperature Grade
INDUSTRIAL
Terminal Position
QUAD
Additional Feature
128 MACROCELLS
Number of I/O Lines
80
Number of Terminals
100
Terminal Pitch (mm)
0.5
Number of Macro Cells
128
Package Body Material
PLASTIC/EPOXY
In-System Programmable
YES
Propagation Delay (ns)
17.5
Seated Height-Max (mm)
1.2
Supply Voltage-Max (V)
3.63
Supply Voltage-Min (V)
2.97
Supply Voltage-Nom (V)
3.3
Programmable Logic Type
EE PLD
Package Equivalence Code
TQFP100,.63SQ
Clock Frequency-Max (MHz)
59
Moisture Sensitivity Level
3
Number of Dedicated Inputs
2
Peak Reflow Temperature (Cel)
240
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
-40
Time@Peak Reflow Temperature-Max (s)
30