PEEL18CV8LPI-15 by INTEGRATED CIRCUIT TECHNOLOGY CORP | Sourcengine

INTEGRATED CIRCUIT TECHNOLOGY CORP PEEL18CV8LPI-15

Lifecycle status
Discontinued
Description
EE PLD, 15ns, CMOS, PDIP20
Category
Semiconductors Programmable Logic ICs Programmable Logic Devices EE PLD

HTS Code
8542.39.00.01
SB Code
8542.31.00.55

Technology
CMOS
Width (mm)
7.62
Length (mm)
26.162
JESD-30 Code
R-PDIP-T20
Organization
9 DEDICATED INPUTS, 8 I/O
Package Code
DIP
Package Shape
RECTANGULAR
Package Style
IN-LINE Meter
Surface Mount
NO
Terminal Form
THROUGH-HOLE
Output Function
MACROCELL
DLA Qualification
Not Qualified
Temperature Grade
INDUSTRIAL
Terminal Position
DUAL
Additional Feature
8 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
Number of I/O Lines
8
Number of Terminals
20
Terminal Pitch (mm)
2.54
Package Body Material
PLASTIC/EPOXY
Propagation Delay (ns)
15
Supply Voltage-Max (V)
5.5
Supply Voltage-Min (V)
4.5
Supply Voltage-Nom (V)
5
Programmable Logic Type
EE PLD
Package Equivalence Code
DIP20,.3
Clock Frequency-Max (MHz)
41.6
Number of Dedicated Inputs
9
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
-40