PDM44068SA5J by PARADIGM TECHNOLOGY INC | Sourcengine

PARADIGM TECHNOLOGY INC PDM44068SA5J

Lifecycle status
Discontinued
Description
Cache SRAM, 64KX18, CMOS, PQCC52
Category
Semiconductors Memory ICs SRAMs CACHE SRAM

ECCN
3A991.b.2.a
ECCN Governance
EAR
HTS Code
8542.32.00.41
SB Code
8542.32.00.40

Technology
CMOS
JESD-30 Code
S-PQCC-J52
Memory Width
18
Package Code
QCCJ
Output Enable
YES
Package Shape
SQUARE
Package Style
CHIP CARRIER Meter
Surface Mount
YES
Terminal Form
J BEND
Memory IC Type
CACHE SRAM
Operating Mode
SYNCHRONOUS
Number of Ports
1
Parallel/Serial
PARALLEL
DLA Qualification
Not Qualified
Temperature Grade
COMMERCIAL
Terminal Position
QUAD
Memory Organization
64KX18
Number of Functions
1
Number of Terminals
52
Number of Words Code
64K
Memory Density (bits)
1179648
Package Body Material
PLASTIC/EPOXY
Output Characteristics
3-STATE
Supply Voltage-Max (V)
5.25
Supply Voltage-Min (V)
4.75
Supply Voltage-Nom (V)
5
Number of Words (words)
65536
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0