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HSP48212JC-40

Renesas Electronics Corp.

Renesas Electronics Corp. HSP48212JC-40
  • ECCN
    3A991.a.2
  • ECCN Governance
    EAR
  • HTS Code
    8542.39.00.60
  • SB Code
    8542.39.00.60
  • Technology
    CMOS
  • Width (mm)
    24.23
  • Length (mm)
    24.23
  • JESD-30 Code
    S-PQCC-J68
  • Package Code
    QCCJ
  • Boundary Scan
    NO
  • Package Shape
    SQUARE
  • Package Style
    CHIP CARRIER Meter
  • Surface Mount
    YES
  • Terminal Form
    J BEND
  • Low Power Mode
    YES
  • Temperature Grade
    COMMERCIAL
  • Terminal Position
    QUAD
  • Additional Feature
    PROGRAMMABLE PIPELINE DELAY OF UP TO 7 CLOCK CYCLES
  • Number of Terminals
    68
  • Terminal Pitch (mm)
    1.27
  • Output Data Bus Width
    13
  • Package Body Material
    PLASTIC/EPOXY
  • Seated Height-Max (mm)
    4.57
  • Supply Voltage-Max (V)
    5.25
  • Supply Voltage-Min (V)
    4.75
  • Supply Voltage-Nom (V)
    5
  • External Data Bus Width
    12
  • Supply Current-Max (mA)
    170
  • Package Equivalence Code
    LDCC68,1.0SQ
  • Clock Frequency-Max (MHz)
    40
  • uPs/uCs/Peripheral ICs Type
    DSP PERIPHERAL, MIXER
  • Operating Temperature-Max (Cel)
    70
  • Operating Temperature-Min (Cel)
    0

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HSP48212JC-40
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HSP48212JC-40