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HDSP66111AMG/H

SIGNAL PROCESSING TECHNOLOGIES

SIGNAL PROCESSING TECHNOLOGIES HDSP66111AMG/H
  • ECCN
    3A001.a.2.c
  • ECCN Governance
    EAR
  • HTS Code
    8542.31.00.35
  • SB Code
    8542.31.00.35
  • Technology
    CMOS
  • JESD-30 Code
    S-CPGA-P144
  • Package Code
    PGA
  • Boundary Scan
    NO
  • Package Shape
    SQUARE
  • Package Style
    GRID ARRAY Meter
  • Surface Mount
    NO
  • Terminal Form
    PIN/PEG
  • Barrel Shifter
    NO
  • J-STD-609 Code
    e0
  • Low Power Mode
    NO
  • Terminal Finish
    Tin/Lead (Sn/Pb)
  • Address Bus Width
    0
  • DLA Qualification
    Not Qualified
  • Terminal Position
    PERPENDICULAR
  • Number of Terminals
    144
  • Terminal Pitch (mm)
    2.54
  • Package Body Material
    CERAMIC, METAL-SEALED COFIRED
  • Supply Voltage-Max (V)
    5.5
  • Supply Voltage-Min (V)
    4.5
  • Supply Voltage-Nom (V)
    5
  • External Data Bus Width
    0
  • Supply Current-Max (mA)
    425
  • Package Equivalence Code
    PGA144,15X15
  • Internal Bus Architecture
    MULTIPLE
  • uPs/uCs/Peripheral ICs Type
    DIGITAL SIGNAL PROCESSOR, OTHER
  • Screening Level / Reference Standard
    MIL-STD-883 Class B (Modified)

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HDSP66111AMG/H
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HDSP66111AMG/H