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CY7C346-25RI

Cypress Semiconductor Corporation

Cypress Semiconductor Corporation CY7C346-25RI
  • HTS Code
    8542.39.00.01
  • SB Code
    8542.31.00.55
  • JTAG BST
    NO
  • Technology
    CMOS
  • Width (mm)
    33.3375
  • Length (mm)
    33.3375
  • JESD-30 Code
    S-CPGA-P100
  • Organization
    19 DEDICATED INPUTS, 64 I/O
  • Package Code
    WPGA
  • Package Shape
    SQUARE
  • Package Style
    GRID ARRAY, WINDOW Meter
  • Surface Mount
    NO
  • Terminal Form
    PIN/PEG
  • J-STD-609 Code
    e0
  • Output Function
    MACROCELL
  • Terminal Finish
    TIN LEAD
  • DLA Qualification
    Not Qualified
  • Temperature Grade
    INDUSTRIAL
  • Terminal Position
    PERPENDICULAR
  • Additional Feature
    LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
  • Number of I/O Lines
    64
  • Number of Terminals
    100
  • Terminal Pitch (mm)
    2.54
  • Number of Macro Cells
    128
  • Package Body Material
    CERAMIC, METAL-SEALED COFIRED
  • In-System Programmable
    NO
  • Propagation Delay (ns)
    52
  • Seated Height-Max (mm)
    5.715
  • Supply Voltage-Max (V)
    5.5
  • Supply Voltage-Min (V)
    4.5
  • Supply Voltage-Nom (V)
    5
  • Programmable Logic Type
    UV PLD
  • Package Equivalence Code
    PGA100M,13X13
  • Clock Frequency-Max (MHz)
    34.5
  • Number of Dedicated Inputs
    19
  • Operating Temperature-Max (Cel)
    85
  • Operating Temperature-Min (Cel)
    -40

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CY7C346-25RI
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CY7C346-25RI