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CY7C342B-30RMB

Cypress Semiconductor Corporation

Cypress Semiconductor Corporation CY7C342B-30RMB
  • ECCN
    3A001.a.2.c
  • ECCN Governance
    EAR
  • HTS Code
    8542.31.00.55
  • SB Code
    8542.31.00.55
  • JTAG BST
    NO
  • Technology
    CMOS
  • Width (mm)
    27.9527
  • Length (mm)
    27.9527
  • JESD-30 Code
    S-CPGA-P68
  • Organization
    7 DEDICATED INPUTS, 52 I/O
  • Package Code
    WPGA
  • Package Shape
    SQUARE
  • Package Style
    GRID ARRAY, WINDOW Meter
  • Surface Mount
    NO
  • Terminal Form
    PIN/PEG
  • J-STD-609 Code
    e0
  • Output Function
    MACROCELL
  • Terminal Finish
    TIN LEAD
  • DLA Qualification
    Not Qualified
  • Temperature Grade
    MILITARY
  • Terminal Position
    PERPENDICULAR
  • Additional Feature
    LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
  • Number of I/O Lines
    52
  • Number of Terminals
    68
  • Terminal Pitch (mm)
    2.54
  • Number of Macro Cells
    128
  • Package Body Material
    CERAMIC, METAL-SEALED COFIRED
  • In-System Programmable
    NO
  • Propagation Delay (ns)
    60
  • Seated Height-Max (mm)
    5.08
  • Supply Voltage-Max (V)
    5.5
  • Supply Voltage-Min (V)
    4.5
  • Supply Voltage-Nom (V)
    5
  • Programmable Logic Type
    UV PLD
  • Package Equivalence Code
    PGA68,11X11
  • Clock Frequency-Max (MHz)
    27.7
  • Number of Dedicated Inputs
    7
  • Operating Temperature-Max (Cel)
    125
  • Operating Temperature-Min (Cel)
    -55
  • Screening Level / Reference Standard
    38535Q/M;38534H;883B

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CY7C342B-30RMB
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CY7C342B-30RMB