CDCVF2510APWR by Texas Instruments Incorporated | Sourcengine

Texas Instruments Incorporated CDCVF2510APWR

Lifecycle status
Active
RoHS
RoHS compliant
REACH
REACH compliant
Description
3.3-V phase-lock loop clock driver with power down mode 24-TSSOP 0 to 85
Category
Semiconductors UPs/uCs/Peripheral ICs Clock Generators

ECCN
EAR99
ECCN Governance
EAR
HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Family
2510
Width (mm)
4.4
Length (mm)
7.8
JESD-30 Code
R-PDSO-G24
Package Code
TSSOP
Logic IC Type
PLL BASED CLOCK DRIVER
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH Meter
Surface Mount
YES
Terminal Form
GULL WING
J-STD-609 Code
e4
Packing Method
TR
fmax-Min (MHz)
175
Terminal Finish
NICKEL PALLADIUM GOLD
DLA Qualification
Not Qualified
Temperature Grade
OTHER
Terminal Position
DUAL
Input Conditioning
STANDARD
Number of Functions
1
Number of Terminals
24
Terminal Pitch (mm)
0.65
Load Capacitance (pF)
25
Package Body Material
PLASTIC/EPOXY
Number of True Outputs
10
Output Characteristics
SERIES-RESISTOR
Propagation Delay (ns)
3.9
Seated Height-Max (mm)
1.2
Supply Voltage-Max (V)
3.6
Supply Voltage-Min (V)
3
Supply Voltage-Nom (V)
3.3
Package Equivalence Code
TSSOP24,.25
Moisture Sensitivity Level
1
Number of Inverted Outputs
0
Output Low Current-Max (mA)
12
Peak Reflow Temperature (Cel)
260
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
0
Propagation Delay-Max@Nom-Sup (ns)
3.9
Same Edge Clock Skew Delay-Max (ns)
.1
Time@Peak Reflow Temperature-Max (s)
30