CDCUA877NMKT by Texas Instruments Incorporated | Sourcengine

Texas Instruments Incorporated CDCUA877NMKT

Lifecycle status
Active
RoHS
RoHS compliant
REACH
REACH compliant
Description
1.8-V/1.9-V phase-lock loop clock driver for DDR2 SDRAM applications 52-NFBGA -40 to 85
Category
Semiconductors UPs/uCs/Peripheral ICs Timers or RTCs

ECCN
EAR99
ECCN Governance
EAR
HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Family
877
Width (mm)
4.5
Length (mm)
7
JESD-30 Code
R-PBGA-B52
Package Code
VFBGA
Logic IC Type
PLL BASED CLOCK DRIVER
Package Shape
RECTANGULAR
Package Style
GRID ARRAY, VERY THIN PROFILE, FINE PITCH Meter
Surface Mount
YES
Terminal Form
BALL
J-STD-609 Code
e1
Packing Method
TR
fmax-Min (MHz)
410
Terminal Finish
TIN SILVER COPPER
Temperature Grade
INDUSTRIAL
Terminal Position
BOTTOM
Input Conditioning
DIFFERENTIAL MUX
Number of Functions
1
Number of Terminals
52
Terminal Pitch (mm)
0.65
Package Body Material
PLASTIC/EPOXY
Number of True Outputs
20
Output Characteristics
3-STATE
Seated Height-Max (mm)
1
Supply Voltage-Max (V)
1.9
Supply Voltage-Min (V)
1.7
Supply Voltage-Nom (V)
1.8
Supply Current-Max (mA)
225
Package Equivalence Code
BGA52,6X10,25
Moisture Sensitivity Level
3
Number of Inverted Outputs
0
Output Low Current-Max (mA)
9
Peak Reflow Temperature (Cel)
260
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
-40
Same Edge Clock Skew Delay-Max (ns)
.035
Time@Peak Reflow Temperature-Max (s)
30